2.3 Memory subsystem
The Power E1080 server uses the next-generation differential dual inline memory modules (DIMMs), which are high-performance, high-reliability, high-function memory cards that contain a buffer chip, intelligence, and 2933/3200 MHz DRAM memory.
DDR4 technology is used and provides the 2933/3200 MHz DRAM memory. DDIMMs are placed in the DDIMM slots in the system node.
Every Power10 chip memory controller unit (MCU) provides the system memory interface between the on-chip SMP interconnect fabric and the OpenCAPI memory interface (OMI) links. Logically eight, essentially-independent MCU channels are on every chip that interface to a total of 16 high-speed OMI links.
Each memory channel supports two OMI links (referred to as subchannels A and B) as shown in Figure 2-13 on page 73, which also shows the memory slot locations that are associated to the related subchannels, channels, and memory controller units. All 16 of the OMI subchannels come off the Power10 SCM and are wired to 16 memory buffer based DDIMM slots, with one DDIMM connected to each OMI subchannel.
72 IBM Power E1080: Technical Overview and Introduction
Figure 2-13 Memory subsystem logical diagram
Each Power10 processor chip supports 16 DDIMMs; therefore, a maximum of 64 DDIMMs in each Power E1080 CEC drawer can support up to 16 TB of memory RAM capacity.
Chapter 2. Architecture and technical overview 73
The DDIMM densities that are supported in the Power E1080 are 32 GB, 64 GB,128 GB and 256 GB and any memory feature code provides four DDIMMs. The DDIMMs have their own voltage regulators and are n+1. redundant. Two PMICs plus two spares are used.
It takes two Power Management IC (PMICs) to supply all the voltage levels that are required by the DDIMM. On the DDIMM, four PMICs are used, which consist of two redundant pairs. If one PMIC in each of the redundant pairs is still functional, the DDIMM is not called for replacement.
As described in 1.5.3, “Memory features” on page 19, the Power E1080 requires the activation of 50% or more of the installed physical memory.
PowerVM hypervisor provides Active Memory Mirroring, which is designed to ensure that system operation continues (even in the unlikely event of an uncorrectable error occurring in main memory).