2.1.13 Comparing Power10, POWER9, and POWER8 processors
The Power E1080 enterprise class systems use exclusively single chip modules (SCM) with up to 15 active SMT8 capable cores. These SCM processor modules are structural and performance optimized for usage in scale-up multi-socket systems. Table 2-5 compares key features and characteristics of the Power10, POWER9, and POWER8 processor implementations as used in enterprise class scale-up servers.
Table 2-5 Comparison of the Power10 processor technology to prior processor generations
Chapter 2. Architecture and technical overview 69
a. Static random-access memory
b. Embedded dynamic random-access memory
c. Power10 processor memory logic and the Power E1080 memory subsystem can use DDR5 technology DIMMs. d. Only DDR3 memory CDIMMs, which are transferred in the context of a model upgrade from Power E870, Power
E870C, Power E880, or Power E880C systems to a Power E980 server, are supported.
2.2 SMP interconnection
Each of the four Power10 processor chips in the system node drawer are connected directly to a Power10 processor chip at the same position in every other system node drawer by using the SMP OP-bus. Each OP-bus connection between any two system node drawers uses a pair of cables for the connection, with each cable carrying one half of the data lanes.
Power System E980 SMP cables cannot be used on Power E1080 because the Power10 processor-based server uses a different set of cables. Figure 2-11 shows how each Power10 processor socket in a system node drawer has the bus routed to the rear tailstock of the chassis. The Power10 processor chip in the first socket (see processor chip socket #0 in Figure 2-11) uses ports T0 and T1 for the OP6 bus connection (see top left corner in Figure 2-11).
Figure 2-11 Logical connection from processor chip sockets to SMP external ports
70 IBM Power E1080: Technical Overview and Introduction
Each Power10 processor chip socket externalizes four SMP/OpenCAPI buses:
Ê OP6: SMP or OpenCAPI Ê OP2: SMP only
Ê OP1: SMP only
Ê OP4: SMP or OpenCAPI
The same cables are used for two different modes:
Ê SMP for interconnecting the system node drawers Ê OpenCAPI
Each cable contains 9 bit lanes:
Ê SMP mode uses nine of nine lanes available
Ê OpenCAPI mode uses eight of the nine lanes available